FPGA Implementation of Single Bit Error Correction using CRC
نویسندگان
چکیده
منابع مشابه
Hardware Implementation of Single Bit Error Correction and Double Bit Error Detection through Selective Bit Placement for Memory
Hamming codes are widely used for the single bit error correction double bit error detection (SEC-DED) which occurred during data transmission process. This paper presents an enhanced detection of double adjacent bit errors and correcting all possible single bit errors in Hamming codes through selective bit placement technique for memory application. Soft errors occur due to the radiation parti...
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The CMOS technology scales down to nano scale and memories are combined with an increasing number of electronic systems; the error rate in memory cells is rapidly increasing. Especially error occurs when memories operate in space satellites due to ionizing effects of atmospheric neutron, alpha-particle, and cosmic rays. SRAM Based FPGA’s are used mostly in Space satellites, which are sensitive ...
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ژورنال
عنوان ژورنال: International Journal of Computer Applications
سال: 2012
ISSN: 0975-8887
DOI: 10.5120/8238-1471